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 NTTFS4821N Power MOSFET
Features
30 V, 57 A, Single N-Channel, m8FL
* * * *
Small Footprint (3.3 x 3.3 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses This is a Pb-Free Device
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V(BR)DSS 30 V RDS(on) MAX 7.0 mW @ 10 V 10.8 mW @ 4.5 V ID MAX 57 A
Applications
* DC-DC Converters * High Side Switching
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA 10 s (Note 1) Power Dissipation RqJA 10 s (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current Current Limited by Pkg. Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TC = 25C TC = 85C TC = 25C TA = 25C, tp = 10 ms TA = 25C PD IDM IDmaxPkg TJ, Tstg IS dV/dt EAS PD ID PD ID PD ID Symbol VDSS VGS ID Value 30 20 13.5 9.7 2.1 18.6 13.4 4.1 7.5 5.4 0.66 57 41 38.5 171 90 -55 to +150 38.5 6.0 55 W A A C A V/ns mJ W A W A W A Unit V V A
N-Channel MOSFET D (5-8)
G (4) S (1,2,3)
MARKING DIAGRAM
1
WDFN8 (m8FL) CASE 511AB FLAT LEAD 4821 A Y WW G
1 S S S G
4821 AYWWG G
D D D D
= Specific Device Code = Assembly Location = Year = Work Week = Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device NTTFS4821NTAG NTTFS4821NTWG Package Shipping WDFN8 1500/Tape & Reel (Pb-Free) WDFN8 5000/Tape & Reel (Pb-Free)
Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source DV/DT Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 50 V, VGS = 10 V, IL = 33 Apk, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
TL
260
C
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size.
(c) Semiconductor Components Industries, LLC, 2009
June, 2009 - Rev. 3
1
Publication Order Number: NTTFS4821N/D
NTTFS4821N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note 4) Junction-to-Ambient - (t 10 s) (Note 3) 3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA RqJA Value 3.25 58.3 188.4 30.6 Unit C/W
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) ID = 20 A ID = 10 A ID = 20 A ID = 10 A VGS = 0 V, VDS = 24 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 25 1.0 10 100 nA V mV/C mA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance
VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.5 1.9 6 5.8 5.7 8.8 8.6 53
2.5
V mV/C
VGS = 10 V to 11.5 V VGS = 4.5 V
7.0
mW
10.8
Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge
gFS Ciss Coss Crss QG(TOT) QG(TH) QGS QGD QG(TOT) td(on) tr td(off) tf
VDS = 15 V, ID = 30 A
S
1300 VGS = 0 V, f = 1.0 MHz, VDS = 12 V 300 150 10.5 VGS = 4.5 V, VDS = 15 V, ID = 30 A 1.3 3.9 4.5 VGS = 11.5 V, VDS = 15 V, ID = 20 A 24
1755 405 233 15
pF
nC
nC
SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 12 VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 22 16 4.5 ns
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTTFS4821N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(on) tr td(off) tf VSD tRR ta tb QRR LS LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A TJ = 25C TJ = 125C VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 8.5 20 23 2.8 ns
DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VGS = 0 V, IS = 20 A 0.9 0.78 9.0 6.5 2.5 1.7 nC ns 1.0 V
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance
0.38 0.054 1.3 0.6 2.0
nH
W
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NTTFS4821N
TYPICAL CHARACTERISTICS
90 80 ID, DRAIN CURRENT (A) 70 60 50 40 30 20 10 0 TJ = 25C 0 1 2 3 4 5 6 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 90 5.0 V 7.0 V VGS = 4.5 V 4.2 V 4.0 V 3.8 V 3.6 V 3.4 V 3.2 V ID, DRAIN CURRENT (A) 80 70 60 50 40 30 20 10 0 0 TJ = 100C TJ = 25C 1 2 TJ = -55C 3 4 5 6 VDS 10 V
10 V
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.015 0.014 0.013 0.012 0.011 0.010 0.009 0.008 0.007 0.006 0.005 0.004 3 4 5 6 7 8 9 ID = 20 A TJ = 25C 0.015
Figure 2. Transfer Characteristics
TJ = 25C 0.013 0.011 0.009 0.007 0.005 0.003 VGS = 10 V VGS = 4.5 V
10
20
30
40
50
60
70
80
90
100
VGS, GATE-TO-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
1.8 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.6 1.4 1.2 1 0.8 0.6 -50 10 ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) 1000 10000
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V
TJ = 150C
TJ = 125C 100
-25
0
25
50
75
100
125
150
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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NTTFS4821N
TYPICAL CHARACTERISTICS
2000 1800 C, CAPACITANCE (pF) 1600 1400 1200 1000 800 600 400 200 0 0 Crss 5 10 15 20 25 30 Coss Ciss VGS = 0 V TJ = 25C 12 10 8 6 4 2 0 Qgs Qgd ID = 30 A TJ = 25C 0 4 8 12 16 20 24
VGS, GATE-TO-SOURCE VOLTAGE (V)
QT
VGS
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge
30
1000 VDD = 15 V ID = 15 A VGS = 10 V 100 t, TIME (ns) td(off) tf tr 10
IS, SOURCE CURRENT (A)
25 20 15 10 5 0 0.2
VGS = 0 V TJ = 25C
td(on)
1
1
10 RG, GATE RESISTANCE (W)
100
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
1000 EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ) 100 10 1 0.1 0.01 VGS = 20 V Single Pulse TC = 25C RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 75
Figure 10. Diode Forward Voltage vs. Current
ID = 33 A
ID, DRAIN CURRENT (A)
10 ms 100 ms 1 ms 10 ms
50
25
dc
100
0 25
50
75
100
125
150
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE(C)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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5
NTTFS4821N
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P CASE 511AB-01 ISSUE B
2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 2X
0.20 C D D1
8765
A
B
0.20 C E1 E
4X
q
1234
TOP VIEW 0.10 C A 0.10 C SIDE VIEW
8X b CAB
c
A1
6X
C
SEATING PLANE
e
DETAIL A
DETAIL A
DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q
MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 --- 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.65 BSC 0.30 0.41 0.51 0.64 --- --- 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ --- 12 _
INCHES NOM 0.030 --- 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.026 BSC 0.012 0.016 0.025 --- 0.012 0.017 0.002 0.005 0.055 0.059 0_ --- MIN 0.028 0.000 0.009 0.006
MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.020 --- 0.022 0.008 0.063 12 _
SOLDERING FOOTPRINT*
e/2
1 4
0.10 0.05
c
L
0.42 K
PACKAGE OUTLINE
8X
0.65 PITCH
0.66
4X
E2
8 5
M D2 BOTTOM VIEW L1 0.75 0.57 2.30 3.60
G
0.47
2.37 3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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6
NTTFS4821N/D


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